Advertisement
Articles
Advertisement

Calculating dynamic resistance to help choose an ESD protective device

Wed, 07/28/2010 - 7:42am
Jim Colby and Chad Marak

LISTED UNDER:

Electronic medical devices, especially those that come into contact with the human body, are at risk for electrostatic discharge (ESD.) Inadequate protection may damage the IC or interfere with communications critical to patient care. This article shows how to choose an ESD device that will give the best chance of a successful first pass design.

ESD protection is vital for medical electronics. However, most datasheets for ESD protective devices leave out the most important piece of information: how much protection the device will actually provide.

 

Some basic ESD topologies and their typical “turn-on” characteristics

(Note: The ESD threat/pulse is defined by the IEC61000-4-2 standard shown in Fig. 1.). We will focus on silicon devices because they tend to give the best ESD clamping, but the points apply to just about any ESD device.

The ESD threat/pulse defined by the IEC61000-4-2 standard

Fig. 1: The ESD threat/pulse defined by the  IEC61000-4-2 standard.

The two most common silicon protection devices are TVS/Zener diodes (Fig. 2) and Diode/Rail Clamps (Fig. 3). The main difference between them is the amount of parasitic capacitance they add.

Internal circuit of a TVS/Zener diode Internal circuit of a Diode/Rail Clamp

Fig. 2: Internal circuit of a TVS/Zener diode.

Fig. 3: Internal circuit of a Diode/Rail Clamp.

Each structure is intended to steer both positive and negative ESD pulses away from the IC being protected. The TVS/Zener will “turn-on” for positive transients when a voltage VZ (typically 6-8 V) is reached and provide a resistive shunt to GND. Likewise, the diode array will steer a positive current through the “upper” diode and into the internal TVS device when a voltage VF+VZ is reached (typically 6-8 V). For negative ESD pulses both structures will conduct when -VF (typically 0.6-0.8 V) is exceeded or the bus being protected falls one diode drop below GND.

 

The electrical characteristics typically given on ESD device datasheets:
Electrical Characteristics

The majority of silicon ESD devices are specified with four main characteristics:

  • ESD Level
  • Reverse Standoff Voltage/Leakage
  • Capacitance
  • Breakdown Voltage.

(There is a fifth characteristic discussed later.)

The ESD level indicates the level of ESD the device can withstand without damage. It gives no guarantee that the IC being protected will survive. The breakdown voltage (usually between 6V-8 V at 1 mA or 10 mA) gives a data point to ensure the ESD device remains inactive during normal circuit operation, but does not indicate the shunt resistance or clamping voltage to expect under an ESD strike. The other two characteristics relate to the device’s “parasitics” and not its performance during an ESD transient.

 

Characteristic Plots

Some of the more common waveforms on an ESD device datasheet are:

  • Capacitance vs. Reverse Bias
  • Power Derating Curve
  • Insertion Loss (S21)
  • ESD Response or Clamp

The first three give no information about the ESD device’s ability to clamp an ESD pulse. The ESD Response plot appears to be helpful but usually leaves out the conditions under which it was taken. However, there is a parameter that can be universally applied to put all ESD devices on equal ground.

 

Dynamic Resistance

The job of a protection device is to provide the lowest resistance shunt path to GND under an ESD event. Figure 4 shows the ESD protection device as a variable resistor with high impedance (low leakage) during normal circuit operation and low impedance during any Electrical Over Stress or ESD event.

An ESD protection device can be considered a variable resistor

Figure 4

A good way to evaluate the effective resistance of an ESD device during an ESD pulse is to use IEC61000-4-5, which defines a current pulse (Fig. 5) with an 8 ?s risetime instead of the 1 ns risetime of an ESD pulse. This tends to minimize the effects of the test setup.

IEC61000-4-5 defines a current pulse with an 8 ?s risetime

Figure 5

Most ESD vendors include the results of this test on their datasheets, either in the electrical table or by means of a plot. But designers tend to overlook these data points since they are either unfamiliar with the “-4-5” test or believe that an “8/20 µs current pulse” is outside the scope of their design. 

No matter how the data is presented (electrical table or plot), calculating the dynamic resistance is simple: Find two points that include a clamping voltage and current level (usually the two lowest current levels to minimize self-heating effects). The example below uses data from the datasheet electrical table of a Littelfuse SP3001 series diode/rail clamp array. In the table, a parameter called “Clamping Voltage” lists input currents of 1 A and 2 A which (typically) gives a 9.5 V and 10.6 V clamp voltage, respectively. Therefore:

 

9.5 V and 10.6 V clamp voltage

This is essentially the shunt resistance the ESD device will provide under an ESD pulse. This calculation makes it possible to effectively evaluate all ESD devices on equal ground irrespective of datasheet differences. 

 

Important Considerations

It is common to think of an ESD pulse in terms of current. As shown in Figure 6, a simplified model of an ESD generator, the voltage on the capacitor (i.e. 8 kV) is discharged through a 330 ? resistor into an ESD protection device. The ESD device is typically <10 ?, so the “output” of the ESD generator is more a current pulse than a voltage spike.

 

Simplified model of an ESD generator
Figure 6

As seen in Figure 1, an ESD pulse reaches its highest voltage in the first nanosecond and then dissipates in less than 100 ns. Table 1 shows the (IEC61000-4-2 specified) relation between the two.

 

Table 1
Table 1

The dynamic resistance can be used only in relative terms or for comparison purposes. For example, take two TVS/Zener ESD devices with the same breakdown voltage (VZ) but different dynamic resistances. Device A=1.0 ? and Device B=2.0 ?. Device B will clearly give a higher peak clamping voltage to an 8 kV ESD strike.

 

Table 2
Table 2

These peak voltages exist for only a few nanoseconds, and often the designer knows only what DC voltage he/she cannot exceed without causing irreparable damage to the IC. Still it is apparent that Device A will give a far better chance of achieving a successful first pass design.

 

Summary

An ESD protector safeguards the health of medical electronics designs. Yet criteria such as parasitic capacitance, standoff voltage, and ESD withstand are not enough to vet all the possible choices for a suitable protection device. The sometimes overlooked “Clamping Voltage” or “tP = 8/20 ?s” specification makes a wise choice possible.

Advertisement

Share this Story

X
You may login with either your assigned username or your e-mail address.
The password field is case sensitive.
Loading