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Eight SMT packaged PLLs with integrated RF voltage controlled oscillators (VCO) are ideal for test equipment applications from 660 MHz to 5.1 GHz. All eight of these PLLs operate in fractional or integer mode, providing the ability to develop high performance phase locked loops in the radio frequency domain. Primarily designed for ultra low phase noise applications, the internal architecture includes a 19-bit RF N-Divider, a 24-bit delta-sigma modulator, a very low noise digital phase frequency detector, and a precision controlled charge pump.


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